System, apparatus, and method for processing wafer using...

Adhesive bonding and miscellaneous chemical manufacture – Differential fluid etching apparatus – Having glow discharge electrode gas energizing means

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C204S298340

Reexamination Certificate

active

06562190

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the manufacture of semiconductor devices. More specifically, the present invention relates to plasma processing systems that employ RF power to process semiconductor wafers.
2. Description of the Related Art
Semiconductor processing systems are used to process semiconductor wafers for fabrication of integrated circuits. In particular, plasma-based semiconductor processes are commonly used in etching, oxidation, chemical vapor deposition (CVD), etc. The plasma-based semiconductor processes are typically carried out by means of plasma processing systems that include parallel plate reactors in a plasma processing chamber to provide a controlled setting. In such plasma processing systems, the parallel plate reactors typically employ two different RF frequencies for generating sufficient plasma density for anisotropic etching and ion bombardment energy for isotropic etching.
FIG. 1
illustrates a conventional plasma processing system
100
that uses two different RF frequencies for processing a semiconductor wafer
102
. The plasma processing system
100
includes a plasma processing chamber
104
, a pair of match networks
106
and
108
, and a pair of RF generators
110
and
112
. The plasma processing chamber
104
includes an electrostatic chuck
114
and a shower head
120
. The shower head
120
includes an upper electrode
122
and is adapted to release a source gas into the chamber
104
for generating plasma over the wafer
102
. The electrostatic chuck
114
includes a lower electrode
124
and functions to hold the wafer
102
in place for processing. A gas
126
such as helium is provided through a port
128
to control the temperature of the wafer
102
. The plasma processing system
100
may also include an electrostatic chuck power supply (not shown) for supplying power to the chuck
114
. Electrostatic chucks are well known in the art and are amply described, for example, in commonly owned U.S. Pat. No. 5,789,904 by Francois Guyot and entitled “High Power Electrostatic Chuck Contact,” U.S. patent application Ser. No. 08/624,988 by Jones et al. and entitled “Dynamic Feedback Electrostatic Wafer Chuck,” U.S. patent application Ser. No. 08/550,510 by Castro et al., and U.S. Pat. No. 5,793,192 by Kubly et al. and entitled “Methods and Apparatus for Clamping and Declamping a Semiconductor Wafer in a Wafer Processing System.” The disclosures of these references are incorporated herein by reference.
The RF generators
110
and
112
are typically arranged to generate a high frequency RF power and a low frequency RF power, respectively, for delivery to the lower electrode
124
in the electrostatic chuck
114
. The high frequency RF power from the RF generator
110
is mostly used to generate plasma (i.e., plasma density) in the space between the shower head
122
and the wafer
102
. On the other hand, the low frequency RF power from the RF generator
112
predominantly controls the generation of ion bombardment energy for anisotropic or directional etching of the wafer
102
. However, these two frequencies do not act independently on the plasma; instead, each frequency generates plasma and contributes to the ion bombardment energy as well.
The RF matching networks
106
and
108
are coupled to deliver RF power from the RF generators
110
and
112
, respectively, to the electrostatic chuck
114
. Generally, the match networks
106
and
108
are coupled to the RF generators
110
and
112
, respectively, by means of co-axial cables
116
and
118
, respectively. The RF matching networks
106
and
108
are provided between the RF generators
110
and
112
, respectively, and the plasma processing chamber
104
to minimize reflection of RF power from the plasma processing chamber
104
. The RF matching network
110
typically includes one or more variable impedance elements (e.g., capacitors, inductors). The variable impedance elements in the RF matching networks
106
and
108
may be tuned to provide impedance that matches the impedance of the RF generators
110
and
112
, respectively. RF match network circuits are well known in the art and are described, for example, in U.S. patent application Ser. No. 5,187,454 by Collins et al. and U.S. patent application Ser. No. 09/218,542 by Arthur M. Howald and filed on Dec. 22 1998. The disclosures of these references are incorporated herein by reference.
The use of both high and low frequency RF power from the RF generators
110
and
112
is designed to ensure adequate supply of plasma and ion bombardment energy. Specifically, when the RF generators
110
and
112
are energized after a source gas
130
has been introduced into the chamber
104
, the high and low frequency powers from the RF generators
110
and
112
facilitate generation of plasma
132
and ion bombardment energy for processing the wafer
102
. The high frequency RF power, typically in the range between 4 MHz to 60 MHz, from the RF generator
110
largely facilitates generation of plasma
132
from the source gas. On the other hand, the low frequency RF power from the RF generator
112
, typically in the range between 100 KHz and 4 MHz, largely facilitates ion bombardment against the wafer
102
by increasing the ion bombardment energy.
When RF powers are applied, bias voltages often called “sheath voltages” are generated near the electrodes
122
and
124
.
FIG. 2A
shows a schematic diagram of plasma sheaths
202
and
204
generated near the surface of the electrodes
122
and
124
, respectively. In this configuration, the sheath voltages which drop across the sheaths
202
and
204
correspond to the floating potential of the plasma and are about four to five times the plasma electron temperature in the absence of RF power. When the low and high frequency RF powers are applied, the RF current i flows from the lower electrode
124
to the upper electrode
122
. The sheath voltages rise close to the peak RF potential. As a result, the sheaths expand and the average voltage drops between the plasma and electrodes
122
and
124
increase. The increase in the voltage drops, in turn, causes increase in ion bombardment energy toward the electrodes
122
and
124
.
Unfortunately, however, one of the drawbacks in using the two-frequency approach of the plasma processing system
100
is the non-uniformity in wafer etch rate associated with the low frequency RF power. In general, the use of high frequency RF power alone generates substantially uniform etch rates across the surface of a wafer. In such cases, however, the etch rate tends to be too low and the pattern profile is poorly controlled due to insufficient ion bombardment energy. The use of low frequency RF power increases the ion bombardment energy.
However, the use of low frequency RF power along with the high frequency RF power in a plasma process system tends to result in non-uniform etching over the surface of the wafer. For example,
FIG. 2B
illustrates a graph
200
of an etch rate as a function of distance from the center of a wafer. As shown, the etch rate of the wafer decreases as the distance from the center of the wafer increases. Thus, the etch rate near the edge of the wafer may not match the design specification, thereby resulting in a lower die yield.
In view of the foregoing, what is needed is a system and method for processing a wafer surface without using a separate low frequency RF power generator in a plasma processing system to enhance the uniformity of wafer processing results without reducing the etch rate on the wafer.
SUMMARY OF THE INVENTION
Broadly speaking, the present invention fills these needs by providing a system, apparatus, and method for processing a wafer using a single frequency RF power in a plasma processing chamber. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, a method, or a computer readable medium. Several inventive embodiments of the present invention are described below.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System, apparatus, and method for processing wafer using... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System, apparatus, and method for processing wafer using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System, apparatus, and method for processing wafer using... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3014924

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.