Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-01-29
2008-01-29
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S765010, C714S716000
Reexamination Certificate
active
07325180
ABSTRACT:
A system to test integrated circuits on a wafer may include a transceiver formed on the wafer. The system may also include an antenna system couplable to the transceiver. The transceiver may be formed in one of a scribe line on the wafer, a chip on the wafer or on an otherwise unusable portion of the wafer. The antenna system maybe formed in at least one of the same scribe line as the transceiver or in at least one other scribe line formed in the wafer. Alternatively, the antenna system may include an antenna external to the wafer.
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Blanton R. Shawn
Pileggi Lawrence
Vogels Thomas
Yue Chik Patrick
Britt Cynthia
Carnegie Mellon University
Moore Charles L.
Moore & Van Allen PLLC
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