System and method to align clock signals

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

Reexamination Certificate

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C713S401000, C711S167000, C375S354000, C375S371000, C375S373000, C375S376000, C365S233100, C365S233110, C365S233120, C365S233130, C327S141000, C327S156000, C327S158000

Reexamination Certificate

active

07430680

ABSTRACT:
A system and method use an aligning device to align clock signals of two logic devices before data transfer between them. In this example, the aligning device aligns a clock signal of a sequencer with a clock signal of a storage device before the sequencer transfers data to the storage device. The aligning device includes a phase detector that receives a first reference clock signal, which is used to control the storage device, and a delayed signal, which is used to control the sequencer, and generates a comparison clock signal. The comparison clock signal is filtered before being used to control a phase of a second reference clock signal, which is related to the first reference clock signal. The phase controlled second clock signal is an aligning clock signal that is feed back to a delay device to produce one or more subsequent delay device clock signals that are aligned to the storage device clock or first reference clock signal. These subsequent delay device clock signals are transmitted to the aligning device and to the sequencer before each transfer occurs.

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