Electrical computers and digital processing systems: virtual mac – Task management or control
Reexamination Certificate
2006-04-11
2006-04-11
An, Meng-Al T. (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
C718S102000, C707S793000, C707S793000
Reexamination Certificate
active
07028297
ABSTRACT:
A transaction processor pipeline architecture and associated apparatus for processing multiple queued transaction requests incorporates multiple processing elements working in parallel. Each processing element is configured to perform a specific function within the transaction processor system. Certain processing elements are assigned as function controllers, which are assigned to process specific transaction request subtask categories and may be augmented with dedicated hardware to accelerate certain subtask functions. Other processing elements are configured as list managers, which are optimized for managing data structure operations in memory. The processing elements are connected by a cross-point interconnect. The transaction processor system is configurable and scalable based on application needs.
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Elumalai Gnanashanmugam
Horn Robert L.
Myran Mark D.
Walls David S.
Wilkins Virgil V.
Ali Syed J
An Meng-Al T.
Aristos Logic Corporation
Dickstein , Shapiro, Morin & Oshinsky, LLP
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