Low-power indicator

Details Low-power indicator Low-power indicator

2006-04-04

2006-04-04

Cottingham, John R. (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

By external command

Reexamination Certificate

active

07024570

ABSTRACT:
A random access memory with a low power mode indicator. The random access memory includes a state machine for generating a power mode output signal. A power mode pin control circuit is connected to the state machine for receiving the power mode output signal. A power mode pin is connected to the power mode pin control circuit for providing an output indicative of the power mode output signal received from the state machine.

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Lebeck, A.R., Fan, X., Zeng, H., Ellis, C., “Power Aware Page Allocation,” Proc. Of Ninth Internat'l Conf. On Arch. Support for Programming Languages and Operating Systems (ASPLOS-IX), Nov., 2000. © ACM 2000.

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