System and method for testing multiple processor modes for...

Details System and method for testing multiple processor modes for... System and method for testing multiple processor modes for...

2011-08-23

2011-08-23

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Testing or evaluating

C716S110000

Reexamination Certificate

active

08006221

ABSTRACT:
A system and method for generating a test case and a bit mask that allows a test case executor the ability to re-execute the test case multiple times using different machine state register bit sets. A test case generator creates a bit mask based upon identified invariant bits and semi-invariant bits. The test case generator includes compensation values corresponding to the semi-invariant bits into a test case, and provides the test case, along with the bit mask, to a test case executor. In turn, the test case executor dispatches the test case multiple times, each time with a different machine state register bit set, to a processor. Each of the machine state register bit sets places the processor in different modes.

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