Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-03-01
2005-03-01
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06862705
ABSTRACT:
An automated test system for testing electrical device I/O pad continuity includes a load board upon which the device under test (“DUT”) is mounted. The number of I/O pins on the DUT exceeds the number of direct testing channels available on the load board. The excess number of I/O pins are connected to boundary scan cells of one or more boundary scan devices. The boundary scan devices receive one or more test data input patterns and test control signals via connection points on the load board. The boundary scan devices, which are complaint with JTAG boundary scan testing standards, are utilized to indirectly test the electrical continuity from the I/O pads of the DUT to the external pins or solder balls of the DUT.
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Dai Hong
Icuss Jim
Nesbitt Richard T.
Applied Micro Circuits Corporation
Incaplaw
Meador Terrance A.
Tu Christine T.
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