System and method for testing a circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Reexamination Certificate

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06968488

ABSTRACT:
Systems and methods for testing a circuit are provided. In one example, a sequential device for use in a scan chain is described. The sequential device may include a scan input, a scan output and a functional data output. The functional data output may be coupled to the scan input and to the scan output. The functional data output may be coupled to the scan output via a delay buffer.

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patent: 2001/0052096 (2001-12-01), Huijbregts
patent: 2003/0093733 (2003-05-01), Zhang
patent: 2003/0200493 (2003-10-01), Campbell
patent: 2004/0003330 (2004-01-01), Block et al.
patent: 2004/0250185 (2004-12-01), Date
patent: 0444 825 (1991-09-01), None
patent: 0 822 419 (1998-02-01), None

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