Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2005-10-04
2005-10-04
Connolly, Mark (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Reexamination Certificate
active
06952789
ABSTRACT:
A mechanism for synchronizing a multiple-circuit system, includes (a) selecting a master circuit from a plurality of circuits, the remaining circuits including at least one slave circuit, (b) receiving, at each of the plurality of circuits, input data and a local clock signal associated with the input data, (d) generating at least one control signal at the master circuit using the local clock signal of the master circuit, (e) outputting the control signal from the master circuit, (f) forwarding the control signal to the slave circuit(s), (g) looping back the control signal to the master circuit, (h) processing the input data at the slave circuit(s) using the forwarded control signal, (i) processing the input data at the master circuit using the looped-back control signal, and (j) outputting the processed data from each of the plurality of circuits.
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Azim Syed K.
Hui Keven B.
Yadavalli Venkat
Connolly Mark
LSI Logic Corporation
Thelen Reid & Priest LLP
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