System and method for reducing pin-count of memory devices,...

Details System and method for reducing pin-count of memory devices,... System and method for reducing pin-count of memory devices,...

2007-08-10

2009-06-30

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S189030, C365S189160, C365S191000

Reexamination Certificate

active

07554858

ABSTRACT:
Methods, memory devices and systems are disclosed. In one embodiment, a non-volatile memory device receives command signals through the same input/output terminals that receive address signals and write data signals and transmit read data signals. The input/output terminals are connected to a multiplexer, which is responsive to a received mode control signal to couple the input/output terminals to either a command bus or an input/output bus. A latch in the memory device latches the command signals when the mode control signal causes the input/output terminals to be coupled to the input/output bus. As a result, the command signals continue to be applied to the command bus. When the mode control signal causes the input/output terminals to be coupled to the input/output bus, write data signals are clocked into the memory device and read data signals are clocked out of the memory device responsive to a received clock signal.

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