System and method for protecting and integrating silicon...

Details System and method for protecting and integrating silicon... System and method for protecting and integrating silicon...

2005-08-02

2005-08-02

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06925614

ABSTRACT:
System and method for integrated circuit (IC) design using silicon intellectual property (IP) libraries that permits the protecting of the designs of circuits in the silicon IP while allowing correctness verification of the IC design. A preferred embodiment comprises a phantom cell (for example, phantom cell505) that contains circuit elements (for example, circuit element EL-A510) connected to each input/output pin of the phantom cell. The inclusion of the circuit elements permits an engineering design tool to check for improperly connected wiring.

REFERENCES:
patent: 5913101 (1999-06-01), Murofushi et al.
patent: 6077304 (2000-06-01), Kasuya
patent: 6308309 (2001-10-01), Gan et al.
patent: 6505323 (2003-01-01), Lipton et al.

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