Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2008-05-13
2008-05-13
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S604000, C438S695000, C438S312000
Reexamination Certificate
active
07371671
ABSTRACT:
A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the photoresist portions are removed. After removing the photoresist portions, the second layer is used to modify the substrate to create at least a portion of the semiconductor device.
REFERENCES:
patent: 4227975 (1980-10-01), Hartman et al.
patent: 5858620 (1999-01-01), Ishibashi et al.
patent: 6492075 (2002-12-01), Templeton et al.
patent: 6680252 (2004-01-01), Chen et al.
patent: 6756673 (2004-06-01), Ahn et al.
Brakensiek, N. et al., Wet-recess Process Optimization of a Bottom Antireflective Coating for the Via First Dual Damascene Scheme, 2004, Proceedings of SPIE: Advances in Resist Technology and Processing XXI, vol. 5376, pp. 1-7.
Chang Ching-Yu
Lin Burn Jeng
Lin Chin-Hsiang
Ford Kenisha V
Haynes & Boone LLP
Lebentritt Michael
Taiwan Semiconductor Manufacturing Company , Ltd.
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