System and method for performing scan test with single scan...

Details System and method for performing scan test with single scan... System and method for performing scan test with single scan...

2006-10-10

2006-10-10

Tu, Christine T. (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000

Reexamination Certificate

active

07120844

ABSTRACT:
A logic system for performing scan test with single scan clock and related method. The logic system includes a first clock domain, which performs logic operations and scan tests with a first clock signal, and a second clock domain, which performs logic operations with a second clock signal and performs scan tests with the first clock signal.

REFERENCES:
patent: 6321355 (2001-11-01), Izaki et al.
patent: 6393592 (2002-05-01), Peeters et al.
patent: 6442722 (2002-08-01), Nadeau-Dostie et al.
patent: 6598192 (2003-07-01), McLaurin et al.

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