Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-01-30
2007-01-30
Do, Thua N. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
11138499
ABSTRACT:
A system for operation verification of a semiconductor integrated circuit has a central processing unit, a design layout memory unit storing design layout information including the design layout configuration of the semiconductor integrated circuit, and a predicted final layout memory storing a predicted final layout configuration predicted by the central processing unit by adding an optical proximity effect to the design layout configuration. The system further has a netlister which describes a procedure for causing the central processing unit to produce a plurality of net lists in which different physical values are registered for a common element in the predicted final layout configuration, a netlist memory unit the plurality of net lists, and a circuit simulator which describes a procedure for causing the central processing unit to perform operation verification of the semiconductor integrated circuit by using an arbitrary one of the plurality of net lists.
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Terai Yuka
Yamashita Kyoji
Do Thua N.
Levin Naum B.
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
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