Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-06-01
2008-03-25
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07350170
ABSTRACT:
A system and method for analyzing a memory element includes modeling the memory element using a simulation method and determining component response characteristics for components of the memory element. Safety regions are computed in a state space of the memory element, which indicate stable states. A transient analysis is performed to determine a path and time needed to reach one of the safety regions. Based on the path and time needed to reach one of the safety regions, a clock waveform or waveforms are determined which place a corresponding state in that safety region.
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Agrawal Bhavna
Feldmann Peter
Nassif Sani R.
Nowicki Tomasz J.
Swirszcz Grzegorz Michal
Chiang Jack
Keusey, Tutunjian & & Bitetto, P.C.
Tat Binh
Verminski, Esq. Brian P.
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