Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Reexamination Certificate
2011-03-29
2011-03-29
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
Reexamination Certificate
active
07917737
ABSTRACT:
A method of performing data and pointer compression includes, in a buffer which is formed between a processor and a level one cache and stores plural tags and full-word values associated with the tags, when the buffer is presented with an address, breaking the address into a line number which indexes a set of the full-word values, and a tag which is used as a key to determine whether a value in the set of full-word values includes a value associated with the presented address, if a tag in the presented address matches a tag in the buffer, returning a full-word value in the buffer which is associated with the tag, and storing the returned full-word value in a destination register of an instruction which originated the presented address, and if a tag in the presented address does not match a tag in the buffer, generating a fault and branching control to a pre-defined handler.
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Bacon David Francis
Cheng Perry
Grove David Paul
Alexanian Vazken
Coleman Eric
International Business Machines - Corporation
McGinn IP Law Group PLLC
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