Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2004-10-27
2010-06-08
Bonzo, Bryce P (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S011000
Reexamination Certificate
active
07734952
ABSTRACT:
A method and system for maintaining the execution speed of a multiprocessor computer system includes automatically detecting a change in instruction execution rate in a disabled processor by a threshold amount and determining an amount of change in instruction execution rate to adjust an actual system-level instruction execution rate to approximate a target system-level instruction execution rate. The target system-level execution rate being pre-determined. Thereafter, the method adjusts one or more instruction processor execution rates such that the actual system-level instruction execution rate approximates the target system-level instruction execution rate to overcome the loss of the disabled processor. One embodiment of the invention involves the use of a processor key for licensing of processor resources within the computer system and offers the option of enabling a dynamic processor recovery method as well as an automatic execution rate regulation method.
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Hoffman Phillip M.
Matyok Anthony P.
Mauer Sharon M.
Paragas Jessica A.
Stell Jeffery A.
Bonzo Bryce P
Gregson Richard J.
Marley Robert P.
Unisys Corporation
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