Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2003-01-16
2004-08-24
Lam, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S149000, C365S189011
Reexamination Certificate
active
06781864
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to the field of computer memories, and more particularly, to memory devices employing memory cells having capacitor structures.
BACKGROUND OF THE INVENTION
One type of non-volatile memory device stores information by altering the direction of polarization of a ferroelectric dielectric layer within the device. The polarization of the dielectric is maintained when power is removed from the system, thus providing non-volatile operation. These devices are structurally similar to capacitors in which the dielectric layer is replaced by a ferroelectric material which can be polarized in one of two directions. The direction of polarization is used to store information, a “1” corresponding to one direction of polarization and a “0” corresponding to the other direction of polarization.
Placing ferroelectric material between the plates of a capacitor on a semiconductor substrate causes the capacitor to exhibit a memory effect in the form of charge polarization between the plates of the capacitor. In effect, when the capacitor is charged with the field lines running in one direction across the capacitor plates, a residual charge polarization remains after the charge is removed from the capacitor plates. If an opposite charge is placed on the capacitor plates, an opposite residual polarization remains. A plot of the applied field voltage (E) across the plates of the capacitor against the polarization (P) of the ferroelectric material between the plates of the capacitor exhibits a hysteresis curve as shown in FIG.
1
. This type of hysteresis response of ferroelectric material between the plates of the capacitor manufactured on a semiconductor die is known in the art.
Using ferroelectric material in the manufacture of capacitors for use in the cells of memory arrays is also known in the art. By applying a coercive voltage across the plates of the ferroelectric capacitor to produce one polarization or another, the residual polarization stores a nonvolatile 1 or 0 in the cell. If a ferroelectric capacitor has zero volts applied across its plates, it may be polarized as indicated by either point A or point D in FIG.
1
. Assuming that the polarization is at point A, if a positive voltage is applied across the capacitor which is greater than the “coercive voltage” indicated by line B, then the capacitor will conduct current and move to a new polarization at point C. When the voltage across the capacitor returns to zero, the polarization will remain the same and move to point D. If a positive voltage is applied across the capacitor when it is polarized at point D, the capacitor will not conduct current, but will move to point C. It can be seen that a negative potential can be used to change the polarization of a capacitor from point D to point A. Therefore, points A and D can represent two logic states occurring when zero volts are applied to the capacitor and which depend upon the history of voltage applied to the capacitor.
The direction of the polarization may be sensed by applying a potential sufficient to switch the polarization across the capacitor. For example, assume that the applied potential difference is such that it would switch the dielectric to the polarization state corresponding to a “1”. If the capacitor was polarized such that it stored a “1” prior to the application of the read potential, the polarization will not be altered by the read voltage. However, if the capacitor was polarized such that it stored a “0” prior to the application of the read potential, the polarization direction will switch. This switching will give rise to a current that flows from one plate of the capacitor to the other. A sense amplifier measures the current that flows in response to the read potential to determine the state of the capacitor. Once the capacitor has been read, the data must be rewritten in the capacitor if the read potential caused the state of the capacitor to switch.
While this type of memory has been known to the art for some time, various problems have limited commercial realizations of this type of memory. One such problem is commonly referred to as “imprinting.” Imprinting is the tendency of a ferroelectric capacitor to exhibit a shift of its hysteresis curve along the voltage axis in either the positive or negative direction depending on the data stored therein. It is believed that charge defects, for example oxygen vacancies, in the ferroelectric material tend to electromigrate over a certain period of time and aggregate at the interface of the ferroelectric material and one of the capacitor electrodes, thus causing the hysteresis curve to shift. This tendency can lead to a logic state failure for either of two reasons. First, after a sufficient shift, both logic states appear the same to a sense amplifier. Second, the coercive voltage becomes too large to be switched by the available programming voltage. When either case is encountered, a memory cell based on the capacitor becomes useless.
Some have addressed the imprinting problem by attempting to improve the process of fabricating the ferroelectric memory cells, for example, the process described in U.S. Pat. No. 6,121,648 to Evans, Jr. However, taking this approach generally requires the addition of several steps to existing process flows. Integrating the additional steps often require extensive modification of known processes and introduce additional complexities to already complicated fabrication processes. Moreover, the additional process steps increase the time required to complete fabrication of the memory devices, consequently, reducing fabrication throughput and production efficiency. Therefore, there is a need for an alternative approach that addresses problems, such as imprinting, that are associated with ferroelectric memory cells.
SUMMARY OF THE INVENTION
The present invention is directed to a system and method for inhibiting the imprinting of capacitor structures employed by memory cells. A bias having the appropriate polarity to change the charge state of the capacitors to a complementary charge state is applied to the memory cells of an array. As a result, the charge defects can be maintained within or drawn back toward the bulk of the ferroelectric material of the capacitors.
REFERENCES:
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patent: 5663904 (1997-09-01), Arase
patent: 5852571 (1998-12-01), Kinney
patent: 5905672 (1999-05-01), Seyydey
patent: 5946224 (1999-08-01), Nishimura
patent: 5953245 (1999-09-01), Nishimura
patent: 5978252 (1999-11-01), Miwa
patent: 6121648 (2000-09-01), Evans, Jr.
patent: 6522570 (2003-02-01), Basceri et al.
Basceri Cem
Gealy F. Daniel
Dorsey & Whitney LLP
Lam David
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