Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-03-29
2011-03-29
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
07917806
ABSTRACT:
The status of multiple on-chip power supply systems is indicated for use in modifying chip test flow and diagnosing chip failure. Digital compliance signals are received, each compliance signal associated with one of multiple on-chip power supplies. Each power supply has an associated compliance level, and each compliance signal indicates whether its associated power supply is operating at the associated compliance level. The compliance signals are converted into a power supply status signal indicating status of the compliance signals associated with the power supply. The power supply status signal is output. If a power supply is operating at its associated compliance level, the output power supply status signal indicates that the power supply is passing. If the power supply is not operating at its associated compliance level, the output power supply status signal indicates that the power supply is failing. If a power supply is failing, a memory test may be aborted, simplifying chip failure diagnosis.
REFERENCES:
patent: 4093985 (1978-06-01), Das
patent: 4234920 (1980-11-01), Van Ness et al.
patent: 4584673 (1986-04-01), Kuijk
patent: 4639864 (1987-01-01), Katzman et al.
patent: 4819205 (1989-04-01), McRoberts
patent: 5283792 (1994-02-01), Davies et al.
patent: 5317704 (1994-05-01), Izawa et al.
patent: 5333309 (1994-07-01), Hibi
patent: 5392292 (1995-02-01), Davis et al.
patent: 5436731 (1995-07-01), Miura
patent: 5737616 (1998-04-01), Watanabe
patent: 5996079 (1999-11-01), Klein
patent: 6263453 (2001-07-01), Anderson
patent: 6550017 (2003-04-01), Moiin et al.
patent: 6748519 (2004-06-01), Moore
patent: 6965300 (2005-11-01), Lee
patent: 7243261 (2007-07-01), Yashiro
patent: 7295051 (2007-11-01), Li et al.
patent: 7337357 (2008-02-01), Cagno et al.
patent: 7581137 (2009-08-01), Okada et al.
patent: 7607043 (2009-10-01), Crawford et al.
patent: 7676693 (2010-03-01), Otsuka et al.
patent: 2003/0101373 (2003-05-01), Freyman et al.
patent: 2004/0019814 (2004-01-01), Pappalardo et al.
patent: 2005/0160316 (2005-07-01), Shipton
patent: 2008/0082850 (2008-04-01), Otsuka et al.
Anand Darren L.
Fifield John A.
Gorman Kevin W.
Beausoliel Robert
Cantor & Colburn LLP
International Business Machines - Corporation
LeStrange Michael
Riad Amine
LandOfFree
System and method for indicating status of an on-chip power... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for indicating status of an on-chip power..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for indicating status of an on-chip power... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2716380