Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-10-11
2005-10-11
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06954913
ABSTRACT:
A system and method of determining an in-situ signal path delay on an integrated circuit. The system and method includes inputting a first signal to a first input node of a first signal path and inputting a second signal to a second input node of a reference signal path. A phase of the first signal output from a first output node of the first signal path is compared to a phase of the second signal output from a second output node of the reference signal path. A phase error signal is output.
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Gauthier Claude R.
Trivedi Pradeep
Dimyan Magid Y.
Martine & Penilla & Gencarella LLP
Siek Vuthe
Sun Microsystems Inc.
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