Semiconductor device manufacturing: process – With measuring or testing – Optical characteristic sensed
Reexamination Certificate
2006-03-29
2009-12-08
Zarneke, David A (Department: 2891)
Semiconductor device manufacturing: process
With measuring or testing
Optical characteristic sensed
C257S048000, C257S797000, C257SE21529, C257SE23179
Reexamination Certificate
active
07629186
ABSTRACT:
A method and a system of alignment of an integrated circuit chip pick-and-place equipment with an origin of a wafer supporting these circuits, comprising optically searching on the wafer at least one reference pattern formed, on manufacturing of the integrated circuits, in a reference chip, the reference pattern being different from optically-recognizable patterns of the other chips.
REFERENCES:
patent: 6380000 (2002-04-01), Subramanian
patent: 6756796 (2004-06-01), Subramanian
patent: 10219346 (2003-11-01), None
patent: 1424723 (2004-06-01), None
patent: 63136542 (1988-06-01), None
patent: 01218019 (1989-08-01), None
French Search Report, FR663454, Feb. 7, 2006.
Graybeal Jackson LLP
Jorgenson Lisa K.
Rusyn Paul F.
STMicroelectronics SA
Zarneke David A
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