Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2009-11-13
2011-11-01
Beausoliel, Jr., Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S006100, C714S006110, C714S006130, C714S042000, C714S054000, C714S746000, C714S768000
Reexamination Certificate
active
08051337
ABSTRACT:
A system and method for fast detection of cache memory hits in memory systems with error correction/detection capability is provided. A circuit for determining an in-cache status of a memory address comprises an error detect unit coupled to a cache memory, a comparison unit coupled to the cache memory, a results unit coupled to the comparison unit, and a selection unit coupled to the results unit and to the error detect unit. The error detect unit computes an indicator of errors present in data stored in the cache memory, wherein the data is related to the memory address. The comparison unit compares the data with a portion of the memory address, the results unit computes a set of possible in-cache statuses based on the comparison, and the selection unit selects the in-cache status from the set of possible in-cache statuses based on the indicator.
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Beausoliel, Jr. Robert
Lottich Joshua P
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
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