System and method for erase voltage control during multiple...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185180, C365S185290, C365S185330

Reexamination Certificate

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06891752

ABSTRACT:
A method for erasing a flash memory. In a flash memory device having multiple sectors a plurality of sectors is selected for erase (810). a subset of sectors is selected (815) and an erase pulse is applied simultaneously to all sectors in the subset (820). After the application of an erase pulse having an initial voltage value, at least one sector of the subset is verified (825). If there is at least one unerased cell in the verified sector, the erase voltage is adjusted (830) and another erase pulse is applied to the subset of sectors (820). The adjustment of the erase voltage may be a function of the number of times that an erase pulse has been applied to the subset. This cycle is repeated on the subset until the selected sector is verified as erased. After a sector is verified, the erase/verify cycle is applied to one or more of the remaining sectors in the subset until each of the remaining sectors has been verified as erased. After all of the sectors in the subset are erased, the erase voltage is reset to its initial value (840) and another subset of sectors is selected for erase/verify as described above (815). The process may be repeated until all of the memory sectors in the device have been erased (850). A flash memory device with embedded logic may be used to execute the method.

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patent: 1 225 596 (2002-07-01), None
patent: 1 225 596 (2002-07-01), None

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