Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2005-05-10
2005-05-10
Phan, Trong (Department: 2818)
Static information storage and retrieval
Floating gate
Particular connection
C365S185180, C365S185290, C365S185330
Reexamination Certificate
active
06891752
ABSTRACT:
A method for erasing a flash memory. In a flash memory device having multiple sectors a plurality of sectors is selected for erase (810). a subset of sectors is selected (815) and an erase pulse is applied simultaneously to all sectors in the subset (820). After the application of an erase pulse having an initial voltage value, at least one sector of the subset is verified (825). If there is at least one unerased cell in the verified sector, the erase voltage is adjusted (830) and another erase pulse is applied to the subset of sectors (820). The adjustment of the erase voltage may be a function of the number of times that an erase pulse has been applied to the subset. This cycle is repeated on the subset until the selected sector is verified as erased. After a sector is verified, the erase/verify cycle is applied to one or more of the remaining sectors in the subset until each of the remaining sectors has been verified as erased. After all of the sectors in the subset are erased, the erase voltage is reset to its initial value (840) and another subset of sectors is selected for erase/verify as described above (815). The process may be repeated until all of the memory sectors in the device have been erased (850). A flash memory device with embedded logic may be used to execute the method.
REFERENCES:
patent: 5270979 (1993-12-01), Harari et al.
patent: 5396468 (1995-03-01), Harari et al.
patent: 5537358 (1996-07-01), Fong
patent: 5745410 (1998-04-01), Yiu et al.
patent: 5751637 (1998-05-01), Chen et al.
patent: 6055184 (2000-04-01), Acharya et al.
patent: 6172909 (2001-01-01), Haddad et al.
patent: 6188609 (2001-02-01), Sunkavalli et al.
patent: 6208558 (2001-03-01), Chen et al.
patent: 1 225 596 (2002-07-01), None
patent: 1 225 596 (2002-07-01), None
Bautista Edward V.
Cheah Ken Cheong
Lee Weng Fook
Advanced Micro Devices
Phan Trong
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