System and method for electrical data link testing

Details System and method for electrical data link testing System and method for electrical data link testing

2005-06-28

2005-06-28

Lamarre, Guy J. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S715000, C714S717000, C375S224000, C324S527000

Reexamination Certificate

active

06912679

ABSTRACT:
A system and method provides for direct control of a high speed data link in a computer system for purposes of testing the data link under a full range of anticipated operating conditions. The transmission of test data is preferably under hardware control and preferably does not encounter interference from other data sources in the computer system thereby enabling the intended test pattern data to be experienced by the data link under test in unaltered form. The tested data is preferably compared to the original data in order to evaluate the status of the link under test.

REFERENCES:
patent: 6169763 (2001-01-01), Woodward et al.
patent: 6381269 (2002-04-01), Gradl et al.
Floyd et al. “Real-time on-board bus testing; IEEE Proceedings VLSI Test Symposium; Page(s): 140-145; Apr. 30-May 3, 1995”.
Floyd et al. << Real-time on-board bus testing; IEEE Proceedings VLSI Test Symposium; Page(s): 140-145; Apr. 30-May 3, 1995.

Affiliated with

Also associated with

Rating

System and method for electrical data link testing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for electrical data link testing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for electrical data link testing will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3505444