System and method for charge-balanced, continuous-write mask...

Details System and method for charge-balanced, continuous-write mask... System and method for charge-balanced, continuous-write mask...

2007-02-27

2007-02-27

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10823981

ABSTRACT:
A charge-balanced, continuous-write mask and wafer process changes the magneto resistive photo-definition step to a two-mask step operation. Critical images are written on one mask layer at a very small electron beam spot size, and non-critical images are written on a second mask layer at a relatively larger electron beam spot size. Both mask layers are put onto the same glass substrate where the critical mask layer is located at the most accurate position on the substrate. The non-critical images may be placed in a peripheral field. In wafer processing, the critical field is aligned and exposed onto the wafer and then the non-critical field is aligned and exposed.

REFERENCES:
patent: 5272501 (1993-12-01), Nishi et al.
patent: 2004/0166419 (2004-08-01), Lee
patent: 2005/0104013 (2005-05-01), Stengl et al.
patent: 2005/0130045 (2005-06-01), Ozawa
patent: 2005/0170655 (2005-08-01), Bencher et al.
patent: 2005/0198602 (2005-09-01), Brankner
patent: 2005/0219767 (2005-10-01), Nakamura et al.

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