System and method for characterizing a signal path using a...

Details System and method for characterizing a signal path using a... System and method for characterizing a signal path using a...

2007-01-16

2007-01-16

Chung, Phung My (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S728000, C714S738000

Reexamination Certificate

active

11124458

ABSTRACT:
A system and method are disclosed for characterizing a signal path. The system includes a system clock configured to produce a system clock signal at a sample frequency. A frequency divider is configured to divide the sample frequency of the system clock signal by a factor of N to produce a chip clock signal at a chip frequency. The system further includes a pseudo-noise (PN) sequence generator configured to produce a PN sequence at the chip frequency and couple the PN sequence to the signal path while the signal path is carrying an operational signal. A sub-chip sampler is configured to correlate the PN sequence and a reflected PN sequence which has been reflected within the signal path to form a correlated signal and to sample the correlated signal at the sample frequency of the system clock signal.

REFERENCES:
patent: 3947634 (1976-03-01), Betts
patent: 4017798 (1977-04-01), Gordy et al.
patent: 6294936 (2001-09-01), Clementi
patent: 6317452 (2001-11-01), Durrant et al.
patent: 6665358 (2003-12-01), Odagiri
patent: 6801569 (2004-10-01), Yang

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