System and method for bit interleaving of half-rate speech data

Details System and method for bit interleaving of half-rate speech data System and method for bit interleaving of half-rate speech data

1997-06-12

2000-03-07

Nguyen, Hoa T.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

714752, 714701, G06F 1100

Patent

active

060354348

ABSTRACT:
A memory-efficient system and method for generating data blocks "on demand" for TDMA data bursts. In one embodiment of the present invention, a GSM transmitter module converts forward error correction (FEC) coded half-rate speech frames into TDMA data blocks. The transmitter module includes a memory configured to store the FEC coded frames in a current frame buffer and a previous frame buffer, an address generator configured to generate addresses of words in the current frame buffer during even clock cycles and addresses of words in the previous frame buffer during odd clock cycles. To generate the word addresses, the address generator operates on word offsets provided by a bit position generator, which also generates intra-word bit offsets. The memory provides the data words requested by the address generator to a multiplexer, which the selects a bit from each of the data words as indicated by the intra-word bit offsets from the bit position generator. The stream of bits from the multiplexer forms the bit reordered and frame interleaved data for the data blocks.

REFERENCES:
patent: 4318126 (1982-03-01), Sassler
patent: 4750173 (1988-06-01), Bliithgen
patent: 4989244 (1991-01-01), Naruse et al.
patent: 5146554 (1992-09-01), Statt
patent: 5237324 (1993-08-01), Linz et al.
patent: 5420870 (1995-05-01), Kim
Global System for Mobile Communications' Technical Specification 05.03 (GSM 05.03) Digital cellular telecommunications system (Phase 2+); Channel coding: version 5.1.0, May 1996, pp. 1-31.

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