Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
Reexamination Certificate
2008-06-10
2011-11-01
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Transmission facility testing
C714S715000, C714S724000
Reexamination Certificate
active
08051340
ABSTRACT:
A method of balancing signal interconnect path delays between an analog domain and a digital domain of an integrated circuit includes applying a test signal to a selected one of a plurality of communication paths between the analog domain and the digital domain. A rising edge delay and a falling edge delay of the test signal is equalized by adjusting a body bias voltage of a delay element configured within the selected communication path. A rising edge delay and a falling edge delay for each of the remaining communication paths is compared with the equalized rising edge delay and falling edge delay of the selected communication path, and a body bias voltage for one or more of a plurality of delay elements configured within each of the remaining communication paths is adjusted until corresponding rising and falling edge delays thereof match the equalized rising edge delay and falling edge delay of the selected communication path.
REFERENCES:
patent: 3956709 (1976-05-01), Osakabe et al.
patent: 5121014 (1992-06-01), Huang
patent: 5920222 (1999-07-01), Eustis et al.
patent: 5954821 (1999-09-01), Young
patent: 6011732 (2000-01-01), Harrison et al.
patent: 6219822 (2001-04-01), Gristede et al.
patent: 6285229 (2001-09-01), Chu et al.
patent: 6366149 (2002-04-01), Lee et al.
patent: 6404243 (2002-06-01), Koch, II et al.
patent: 6448840 (2002-09-01), Kao et al.
patent: 6529085 (2003-03-01), Hajimiri et al.
patent: 6550045 (2003-04-01), Lu et al.
patent: 6653890 (2003-11-01), Ono et al.
patent: 6703879 (2004-03-01), Okuda et al.
patent: 6737901 (2004-05-01), Hein et al.
patent: 7073145 (2006-07-01), Fry et al.
patent: 7134062 (2006-11-01), Yan
patent: 7212695 (2007-05-01), Kasper et al.
patent: 2002/0005750 (2002-01-01), Kao et al.
patent: 0252747 (2002-07-01), None
Cranford, Jr. Hayden C.
Iadanza Josep A.
Ventrone Sebastian T.
Cain David
Cantor & Colburn LLP
International Business Machines - Corporation
Ton David
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