System and method for balancing delay of signal...

Details System and method for balancing delay of signal... System and method for balancing delay of signal...

2008-07-22

2008-07-22

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Transmission facility testing

C714S724000

Reexamination Certificate

active

10906343

ABSTRACT:
A method of balancing signal interconnect path delays between an analog domain and a digital domain of an integrated circuit includes applying a test signal to a selected one of a plurality of communication paths between the analog domain and the digital domain. A rising edge delay and a falling edge delay of the test signal is equalized by adjusting a body bias voltage of a delay element configured within the selected communication path. A rising edge delay and a falling edge delay for each of the remaining communication paths is compared with the equalized rising edge delay and falling edge delay of the selected communication path, and a body bias voltage for one or more of a plurality of delay elements configured within each of the remaining communication paths is adjusted until corresponding rising and falling edge delays thereof match the equalized rising edge delay and falling edge delay of the selected communication path.

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