System and method for arbitrating interrupts on a...

Electrical computers and digital data processing systems: input/ – Interrupt processing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C710S116000

Reexamination Certificate

active

06260100

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
This invention pertains to a method and apparatus for servicing interrupts on a daisy-chained bus architecture, such as the VME bus. More particularly, it relates to a method and apparatus for assuring balanced servicing of interrupts from devices on the same interrupt level.
2. Background Art
In a daisy-chained bus, such as the VME bus, no architected method is provided for insuring that interrupts from two different devices which share the same interrupt level will be serviced in a balanced manner. A device that generates interrupts very frequently will be serviced much more often than another device that is plugged into a higher numbered slot on the bus. Bus protocol is such that it is entirely possible that the other device's interrupt will only be serviced after the device in the lower numbered slot has quiesced. Delaying interrupt service cannot be tolerated in many time critical applications.
The daisy-chained interrupt acknowledge architecture of the VME bus assigns interrupt priority primarily by the level of the interrupt and secondarily by the slot location of the interrupting device. When two devices that share the same interrupt level require interrupt service the device in the lower numbered slot will have its interrupt handled first. The other device's interrupt will be left pending. If the lower numbered device's interrupt again becomes active before the higher numbered device's interrupt was serviced the lower numbered device will again have its interrupt serviced by the interrupt handler. The bus architecture has no protocol to insure that higher numbered devices will not be starved for interrupt service. Thus the occurrence of the problem is dependant upon the interrupt service latency in the interrupt handler and the frequency of interrupts from a lower numbered device.
It is, therefore, an object of the invention to assure balanced servicing of interrupts from devices sharing the same interrupt level in a daisy-chain architected bus.
SUMMARY OF THE INVENTION
In accordance with the invention, a method is provided and an apparatus is provided for assuring balanced servicing of interrupts among devices at the same interrupt level in a daisy-chain architected bus by detecting that a second device on the same level as a first device is having an interrupt serviced, and responsive thereto raising the interrupt level of the first device.
Other features and advantages of this invention will become apparent from the following detailed description of the presently preferred embodiment of the invention, taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 4615019 (1986-09-01), Bonci
patent: 4631670 (1986-12-01), Bradley et al.
patent: 4907149 (1990-03-01), Gula et al.
patent: 5016162 (1991-05-01), Epstein et al.
patent: 5185864 (1993-02-01), Bonevento et al.
patent: 5282272 (1994-01-01), Guy et al.
patent: 5321818 (1994-06-01), Wendling et al.
patent: 5377334 (1994-12-01), Boldt et al.
patent: 5423053 (1995-06-01), Cahen
patent: 5446910 (1995-08-01), Kennedy et al.
patent: 5515538 (1996-05-01), Kleiman
patent: 5590372 (1996-12-01), Dieffenderfer et al.
patent: 5671446 (1997-09-01), Pakitz et al.
patent: 5740383 (1998-04-01), Nally et al.
patent: 478487A (1992-04-01), None
patent: 2225460 (1990-05-01), None
patent: 5-89028 (1993-04-01), None
patent: 8902720 (1989-07-01), None
Bederman, S. “Decentralized Interrupt Logic for Multiprocessor Systems Using Relative Addressing of Register Space”,IBM Technical Disclosure Bulletin, Apr. 1979 pp. 4519-4523.
Schott, K. P. “Control of Time Delay Generation for Elements in a Daisy Chain”,IBM Technical Disclosure Bulletin, Jul. 1989, pp. 294-297.
Claffey-Cohen, M.E. “Method of Improving Parallel Port Interrupts in Personal Computers”,IBM Technical Disclosure Bulletin, Jun. 1992, pp. 54-58.
Heath, C.A. “Adaptive Interrupt Sharing”,IBM Technical Disclosure Bulletin, Apr. 1986, pp. 4808-4811.
The VMEbus Specification(conforms to IEEE 1014-1987 and IEC 821 & 297), published by VITA, 10299 Scottsdale Road, Suite B, Scottsdale, AZ 85253-1437.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System and method for arbitrating interrupts on a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for arbitrating interrupts on a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for arbitrating interrupts on a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2568308

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.