David A. Wiley

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Adapters with descriptor queue management capability

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Address space architecture for multiple bus computer systems

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Apparatus and a method for avoiding the accidental termination o

Electrical computers and digital processing systems: support – Computer power control – Power sequencing
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Apparatus and method for combining data streams with programmabl

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Apparatus and method for controlling data, address, and enable b

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
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Profile ID: LFUS-PAI-P-62556

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