Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-12-06
2005-12-06
Iqbal, Nadeem (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S030000, C714S047300
Reexamination Certificate
active
06973593
ABSTRACT:
A system analyzer for a data storage system has a control module and a memory module. The system analyzer includes a logic analyzer, an input port that couples to the data storage system, an output port that couples to the logic analyzer, and a pre-processor which is interconnected between the input port and the output port. The pre-processor is configured to receive, while a first point-to-point signal is exchanged between the control module and the memory module, a second point-to-point signal which is a copy of the first point-to-point signal. The pre-processor is further configured to generate a pre-processed signal based on the second point-to-point signal, and to provide the pre-processed signal to the logic analyzer.
REFERENCES:
patent: 2002/0170000 (2002-11-01), Gorodelsky et al.
patent: 2004/0153802 (2004-08-01), Kudo et al.
Porat Ofer
Rabinovich Alexander
Zani Mark
Bonura Timothy M.
EMC Corporation
Huang, Esq. David E.
Iqbal Nadeem
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