Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-03-08
2011-03-08
Chu, Gabriel L (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S037000
Reexamination Certificate
active
07904751
ABSTRACT:
Systems and methods for error handling are disclosed. The systems and methods may be utilized for single or multiple processor computer systems to handle errors in a coordinated manner between hardware and any firmware or software layers. A computer system includes a non volatile memory and at least one processor. A firmware error handling routine is stored on the non volatile memory. The firmware error handling routine is for handling errors. Each of the at least one processors detects errors. Each processor executes the firmware error handling routine on detecting an error. The executed firmware error handling routine handles the error. The executed firmware error handling routine also logs error information to a log.The systems and methods provide for coordinated error handling that enhance error recovery, provide error containment and maintain system availability.
REFERENCES:
patent: 4317010 (1982-02-01), Fillot
patent: 5056091 (1991-10-01), Hunt
patent: 5107500 (1992-04-01), Wakamoto et al.
patent: 5245615 (1993-09-01), Treu
patent: 5313625 (1994-05-01), Hess et al.
patent: 5481707 (1996-01-01), Murphy, Jr. et al.
patent: 5522029 (1996-05-01), Hatfield
patent: 5594861 (1997-01-01), Jonsson et al.
patent: 5594905 (1997-01-01), Mital
patent: 5619644 (1997-04-01), Crockett et al.
patent: 5673386 (1997-09-01), Batra
patent: 5699505 (1997-12-01), Srinivasan
patent: 5717850 (1998-02-01), Apperley et al.
patent: 5740357 (1998-04-01), Gardiner et al.
patent: 5742755 (1998-04-01), Hervin
patent: 5781750 (1998-07-01), Blomgren et al.
patent: 5784547 (1998-07-01), Dittmar et al.
patent: 5787095 (1998-07-01), Myers et al.
patent: 5862308 (1999-01-01), Andress et al.
patent: 5941996 (1999-08-01), Smith et al.
patent: 5948107 (1999-09-01), Ramanathan
patent: 5956480 (1999-09-01), Kurihara
patent: 5958049 (1999-09-01), Mealey et al.
patent: 5991518 (1999-11-01), Jardine et al.
patent: 6058490 (2000-05-01), Allen et al.
patent: 6061810 (2000-05-01), Potter
patent: 6065139 (2000-05-01), Mehta et al.
patent: 6170067 (2001-01-01), Liu et al.
patent: 6173386 (2001-01-01), Key et al.
patent: 6308285 (2001-10-01), Bowers
patent: 6381694 (2002-04-01), Yen
patent: 6408407 (2002-06-01), Sadler
patent: 6438709 (2002-08-01), Poisner
patent: 6622260 (2003-09-01), Marisetty et al.
patent: 6640313 (2003-10-01), Quach
patent: 6665262 (2003-12-01), Lindskog et al.
patent: 6675324 (2004-01-01), Marisetty et al.
patent: 6948094 (2005-09-01), Schultz et al.
patent: 7216252 (2007-05-01), Tu et al.
patent: 7308610 (2007-12-01), Kuramkote et al.
patent: 2004/0095833 (2004-05-01), Marisetty et al.
patent: 2005/0068888 (2005-03-01), Komarla et al.
patent: 2007/0061634 (2007-03-01), Marisetty et al.
patent: 0730230 (1996-09-01), None
patent: 0953911 (1999-11-01), None
Ayyar Mani
Lint Bernard J.
Marisetty Suresh
Quach Nhon T.
Blakely , Sokoloff, Taylor & Zafman LLP
Chu Gabriel L
Intel Corporation
LandOfFree
System abstraction layer, processor abstraction layer, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System abstraction layer, processor abstraction layer, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System abstraction layer, processor abstraction layer, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2737101