Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1996-01-19
1997-04-08
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36523008, 365233, G11C 1300
Patent
active
056194560
ABSTRACT:
The time required to output data from an output buffer is significantly reduced by having a slave latch in a parallel connection with a master latch. Incoming data is stored in a master latch on a first phase of a clock pulse. On the second phase of the clock pulse, the data is output of the master latch and provided to an output driver. A slave latch is coupled to the input node of the output driver. On the subsequent phase of the clock, the slave latch is switched on to hold the state of the input to the output driver constant. The slave latch thus receives the output of the master register in parallel with the output driver and also performs its function of maintaining the input to the output buffer for one entire clock pulse while new data is being presented to the master latch. Data is thus provided more quickly to the output driver than was previously possible with prior art master/slave configurations.
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Carlson David V.
Fears Terrell W.
Galanthay Theodore E.
Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
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