Synchronous memory with read and write mode

Details Synchronous memory with read and write mode Synchronous memory with read and write mode

1998-02-17

2000-01-04

Hoang, Huan

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365194, 365233, G11C 1604

Patent

active

060117281

ABSTRACT:
A semiconductor device that accesses a memory cell in synchronization with a clock signal and improves operation speed when data read-out and write-in are performed successively at the same address is provided.
This device includes:

REFERENCES:
patent: 5305281 (1994-04-01), Lubeck
patent: 5396463 (1995-03-01), Kim et al.
patent: 5488580 (1996-01-01), Park
patent: 5511029 (1996-04-01), Sawada et al.
patent: 5666324 (1997-09-01), Kosugi et al.
patent: 5694370 (1997-12-01), Yoon
patent: 5798969 (1998-08-01), Yoo et al.

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