Synchronous memory device capable of controlling write...

Details Synchronous memory device capable of controlling write... Synchronous memory device capable of controlling write...

2007-08-28

2007-08-28

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S189040, C365S191000, C365S233100

Reexamination Certificate

active

10880831

ABSTRACT:
A memory device for adjusting a write recovery time includes a synchronous write recovery time controlling block which receives a control signal for performing an auto-precharge operation and delays out the control signal as long as a certain clock section of the operational clock corresponding to the write recovery time, an asynchronous write recovery time controlling block for delaying out the control signal coupled thereto as long as a fixed delay time corresponding to the write recovery time, a selecting block for choosing the synchronous write recovery time controlling block or the asynchronous write recovery time controlling block, and an auto-precharge controlling block which outputs as an auto-precharge execution signal used in performing the auto-precharge operation a signal outputted from the synchronous write recovery time controlling block or the asynchronous write recovery time controlling block in response to a write command.

REFERENCES:
patent: 6434082 (2002-08-01), Hovis et al.
patent: 7042781 (2006-05-01), Kim

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