Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-04-03
2007-04-03
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S401000, C713S500000
Reexamination Certificate
active
10519596
ABSTRACT:
A transmission arrangement and method permits time-sensitive data to be transmitted through a packet-switched network and arrive synchronously at separate end points without synchronising all payload carrying nodes in the network. This is achieved by propagating a timing reference through the network from the sending node to the end nodes, each end node adjusting that phase of its local frequency generator to this timing reference. The sending node then sends data structure information to the end nodes, enabling the end nodes to regenerate the timing and structure of the synchronous data stream. Finally delay information is sent to each end node that allows the end nodes to adjust the start of synchronous data transmission by an amount such that all will commence transmission substantially simultaneously. With this information the end nodes independently recreate a signal in synchronisation. This solution has the advantage that the network infrastructure can remain substantially unchanged, although the timing sensitive application can treat the network as if it were a synchronised network.
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European International Search Report for PCT/EP02/07699, dated Mar. 28, 2003.
Andersson Leif Arne Jorgen
Fullemann John
Burleigh Roger S.
Cribbs Malcolm
Lee Thomas
Telefonaktiebolaget LM Ericsson (publ)
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