Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2007-06-12
2007-06-12
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S400000
Reexamination Certificate
active
10702042
ABSTRACT:
In emulation systems having a plurality of chips, data communicated between the chips needs to be synchronized. A receiver chip may push or pull on incoming data from an emitter chip in order to synchronize it with a receiver clock. Unexpected latency on the link between the emitter and receiver chips may also be adjusted for.
REFERENCES:
patent: 5532632 (1996-07-01), Kent
patent: 6636978 (2003-10-01), Kirihata et al.
patent: 6665218 (2003-12-01), Meier et al.
patent: 6690201 (2004-02-01), Simkins et al.
patent: 2003/0219090 (2003-11-01), Baba
“Data to Clock Phase Alignment”, Nick Sawyer, Xilinx Application Note, Apr. 4, 2002.
Clavequin Jean-Paul
Couteaux Pascal
Diehl Philippe
Banner & Witcoff , Ltd.
Mentor Graphics (Holdings) Ltd.
Perveen Rehana
Stoynov Stefan
LandOfFree
Synchronized communication between integrated circuit chips does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Synchronized communication between integrated circuit chips, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronized communication between integrated circuit chips will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3886378