Synchronization device with delay line control circuit to...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay

Reexamination Certificate

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C713S400000, C327S158000

Reexamination Certificate

active

07111185

ABSTRACT:
A method and apparatus for synchronizing signals. For memory devices, such as SDRAMs, implementing a synchronization device to synchronize one signal, such as an external clock signal with a second signal, such as a data signal, tuning elements may be provided at various points in the signal path of the synchronization device. The tuning elements are designed to be identical, such that a single design may be used to a signal mismatch that is produced in either direction, using a single design. The tuning elements may be implemented to provide uniformity in the access time through a range of conditions, such as drain voltages and temperatures.

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