Synchronization circuit and method with transparent latches

Details Synchronization circuit and method with transparent latches Synchronization circuit and method with transparent latches

2006-03-07

2006-03-07

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

C713S600000

Reexamination Certificate

active

07010713

ABSTRACT:
A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.

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