Surface mount chip package having an array of solder ball contac

Details Surface mount chip package having an array of solder ball contac Surface mount chip package having an array of solder ball contac

1993-12-22

1996-02-06

Sparks, Donald A.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361760, 361772, 361776, 361779, 361783, 174260, 22818021, 22818022, 257697, 257738, 257779, 257786, H01R 909, H01L 2348, B23K 3102

Patent

active

054900409

ABSTRACT:
An electrical device for logic circuits having a package comprising a combination of controlled collapse electrical interconnections, such as solder balls and pin through-hole conductors, wherein the conductors are disposed outside the perimeter of an inter-array of solder balls, which when a maximum number of solder balls are disposed, the array is circular in shape, so as to provide an increased footprint for the electrical device beyond that, otherwise maximum footprint for solder balls alone, which footprint is otherwise limited in size due to failures which occur in solder balls when solder balls are exposed to thermal and mechanical stress levels at extended distances from the neutral or zero stress point of the array.

REFERENCES:
patent: 3795845 (1974-03-01), Cass et al.
patent: 3871014 (1975-03-01), King et al.
patent: 3871015 (1975-03-01), Lin et al.
patent: 4067104 (1978-01-01), Tracy
patent: 4581680 (1986-04-01), Garner
patent: 4604644 (1986-08-01), Beckham et al.
patent: 4724472 (1988-02-01), Sugimoto et al.
patent: 4878611 (1989-11-01), LoVasco et al.
patent: 5186383 (1993-02-01), Melton et al.
patent: 5269453 (1993-12-01), Melton et al.
patent: 5394009 (1995-02-01), Loo
IBM Disclosure Bulletin "Chip Mounting With Prestretched Joints" by V. D. Coombs vol. 16 No. 3 Aug. 1973 (p. 767).
IBM Disclosure Bulletin "Method of Preparation of Controlled Chip Joining" by Bakos et al. vol. 21 No. 9 Feb. 1979 (p. 3593).
IBM Disclosure Bulletin "Pluggable-Module Power-Connection Mechanism" vol. 27 No. 10A Mar. 1985 (pp. 5599 and 5600).
IBM Disclosure Bulletin "Area Array Substrate-to-Carrier Interconnection Using Corner Standoff" vol. 29 No. 11 Apr. 1987 (pp. 4736 and 4737.
IBM Disclosure Bulletin "Module Interconnection Using Hybrid Attachment" vol. 35 No. 7 Dec. 1992 (pp. 330 and 331).
IBM Disclosure Bulletin "Module Connection" vol. 37 No. 01 Jan. 1994 (pp. 595 and 596).
IBM Disclosure Bulletin "Solder Ball Connect Design with improved Reliability" vol. 37 No. 04B Apr. 1994 (pp. 137-140).

Affiliated with

Also associated with

Rating

Surface mount chip package having an array of solder ball contac does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Surface mount chip package having an array of solder ball contac, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Surface mount chip package having an array of solder ball contac will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2179094