Surface channel MOS transistors, methods for making the same, an

Details Surface channel MOS transistors, methods for making the same, an Surface channel MOS transistors, methods for making the same, an

1998-09-16

2000-08-29

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438592, H01L 21336

Patent

active

061107883

ABSTRACT:
Methods for making surface channel MOS transistors. The methods are practiced by providing a substrate with at least one isolation region, forming a first dielectric layer over the substrate, forming a first polysilicon layer over the first dielectric layer, removing a portion of the first polysilicon layer to expose a portion of the first dielectric layer, forming at least one diffusion region in the substrate underlying the exposed portion of the first dielectric layer, removing the exposed portion of the first dielectric layer, forming a second dielectric layer over the first polysilicon layer and the at least one diffusion region, forming a second polysilicon layer over the second dielectric layer, removing the portion of the second dielectric layer and second polysilicon layer overlying the first polysilicon layer, depositing a conductive layer over the first and second polysilicon layers, depositing a third dielectric layer over the conductive layers and removing a portion of the third dielectric layer, conductive layer, first and second polysilicon layers, and first and second dielectric layers. The conductive layer may be tungsten silicide. These methods provide surface channel MOS transistors using fewer masking steps; flat polysilicon typography which allows fabrication of smaller device features; and tungsten silicide strapped gates scalable to less than 0.25 micrometers with a low resist level.

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Wolf et al., Silicon Processing for the VLSI Era, vol. III, pp. 291-303.

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