Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1983-05-31
1986-03-18
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365230, 364900, G11C 1300
Patent
active
045772924
ABSTRACT:
The present invention is especially directed towards an improved support circuitry for a memory array which utilizes support circuitry in a memory array such that, when an address compare occurs, selected one of the array word decoders are disabled to prevent a multiple read, and selected higher order read heads are disabled and the output data of the highest order bit lines is transferred onto all of the lower order bit lines having the same address as the uninhibited word decoder.
REFERENCES:
patent: 3801965 (1974-04-01), Keller et al.
patent: 3896417 (1975-07-01), Beecham
patent: 4078261 (1978-03-01), Millhollan et al.
patent: 4090258 (1978-05-01), Cricchi
patent: 4183095 (1980-01-01), Ward
patent: 4314164 (1982-02-01), Tin et al.
Fears Terrell W.
International Business Machines - Corporation
Thornton Francis J.
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