Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-06-12
2002-11-19
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S110000, C438S112000, C438S127000
Reexamination Certificate
active
06482675
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a flexible substrate strip for use in forming a plurality of substrate-based semiconductor chip packages wherein the excess encapsulant can be removed without damaging the packaged electronic device after encapsulating the semiconductor chip.
2. Description of the Related Art
As the need for lighter and more complicated semiconductor devices becomes greater day by day, the semiconductor chips have become more and more complex thereby requiring more electrical connections. Therefore, the ball grid array (BGA) has been developed by the semiconductor chip packaging industry to meet these needs.
A typical BGA package generally includes a chip mounted to the upper surface of a substrate i.e. a printed circuit board. Bonding pads on the active surface of the chip are connected to electrically conductive traces formed on the upper surface of the substrate by bonding wires. The lower surface of the substrate is provided with a plurality of solder pads electrically connected to the electrically conductive traces. Each solder pad is mounted with a solder ball for making external electrical connection. A package body is formed to enclose the chip, the bond wires and a portion of the upper surface of the substrate including most of the electrically conductive traces. The package body is typically formed by a transfer molding process.
FIG. 1
is a top plan view of a conventional transfer molding equipment with flexible substrate strips attached. As shown, the molding equipment includes three transfer pots
201
for accommodating encapsulant. Each transfer pot
201
of the molding equipment has a 25 transfer ram
204
positioned therein and is connected to four gates
208
through a mold runner
206
. Each gate
208
is connected to a cavity
210
. Two flexible substrate strips
230
are placed in the molding equipment in a manner that each substrate unit of the strips
230
adapted for mounting a semiconductor chip is corresponding to each cavity
210
of the molding equipment.
After the encapsulant is loaded in the transfer pots
201
and the flexible substrate strips
230
are fixed and clamped by the molding equipment, the transfer ram
204
is moved downwardly to compress the encapsulant. The molding equipment and encapsulant are pre-heated so that when the transfer ram
204
compresses the encapsulant, the liquefied
5
encapsulant is forced through the mold runners
206
and gates
208
to fill the cavities
210
and thereby encapsulating the semiconductor chips (not shown) mounted on the flexible substrate strips
230
. After the encapsulant fills the cavities
210
, the transfer ram
204
stands still for a predetermined time until the encapsulant cures. Then the transfer ram
204
is withdrawn, the molding equipment is opened, and the molded products are removed from the molding
10
equipment. Extra parts such as runners and gates are removed from the molded products, and then the molded products are cut into individual units, whereby the semiconductor chip packages are completed.
However, one shortcoming of the above process is apparent. Specifically, the encapsulant not only fills the cavities
210
but also fills the gates
208
, the mold runners
206
and the transfer pots
201
. Therefore, when the encapsulant is cured, the cured encapsulant not only covers the semiconductor chips, but also extends along the surface of the flexible substrate strip
230
, where the gates
208
and the mold runners
206
are located, and into the pots
201
. This excess cured encapsulant is often referred to as the “runner” and must be removed before the molded products are singulated. Accordingly, the gate
208
is generally made smaller in cross-sectional area than the mold runner
206
in order to assist in the “degating” process, i.e., the removal of the excess encapsulant. However, the encapsulant tends to adhere to the surface of the substrate, so the removal of the excess encapsulant is likely to twist the flexible substrate strip and causes damage to the surface thereof.
Therefore, it is desirable to provide degating regions
220
on the flexible substrate strip
230
such that the edges of mold runners
206
and gates
208
fit entirely within the degating regions
220
during encapsulation of the chips. Typically, a degating region material such as gold is formed on the degating regions wherein the adhesive force between the encapsulant and the degating region material is less than the adhesive force between the encapsulant and the substrate whereby the excess encapsulant can be removed without damaging the flexible substrate strip.
FIG. 2
is a partial side view of a packaged product
240
with to-be-removed excess encapsulant. As shown in
FIG. 2
, the gate
208
(for simplicity, the mold runner
206
and the transfer pot
201
are not shown in
FIG. 2
) is still linked with the packaged product
240
. After degating, it is desirable to have a substantially regular breaking surface as shown in FIG.
3
. However, there is nearly no resistance force during the removal of the excess encapsulant from the degating region, hence the breaking force is so violent as to generate the defect results as shown in FIG.
4
and FIG.
5
.
FIG. 4
shows a bulge
242
protruding from the outline of the packaged product. The bulge
242
will cause damage to the punch tool during the singulation process.
FIG. 5
shows a concave
244
formed in the packaged product. If the damage caused by the formation of the concave
244
is severe enough, it may harm electrically conductive traces on the flexible substrate strip. Even if there is no direct damage to the substrate, the concave
244
resulting from the degating process may still weaken the seal between the molded body and the upper surface of the substrate, thereby increasing the chances of moisture penetration in the packaged product.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a flexible substrate strip for use in forming a plurality of semiconductor chip packages wherein each degating region of the flexible substrate strip is provided with a buffer region formed therein for alleviating the breaking force during degating process thereby obtaining a substantially regular breaking surface.
A flexible substrate strip in accordance with the present invention comprises a plurality of substrate units adapted for mounting semiconductor chips. The flexible substrate strip is provided with a plurality of degating regions in such manner that the edges of mold runners and gates of a mold used to encapsulate the semiconductor chips in encapsulant material fit entirely within the degating regions when the substrate strip is placed in the mold during encapsulation of the semiconductor chips. The present invention is characterized in that each degating region has a buffer region at a location corresponding to the gate of the mold during encapsulation. The degating regions have a degating region material formed thereon while the buffer regions are not coated with the degating region material. The adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate strip.
Since the buffer regions have no degating region material formed thereon, the surface of the buffer regions has the same characteristics as the substrate strip. Accordingly, the better adhesion of the encapsulant to the surface of the buffer regions helps to alleviate the violent breaking force during the degating process thereby rendering the breaking surface formed on the packaged product more regular.
REFERENCES:
patent: 5538902 (1996-07-01), Izu et al.
patent: 5542171 (1996-08-01), Juskey et al.
patent: 5635671 (1997-06-01), Freyman et al.
patent: 5866949 (1999-02-01), Schueller
patent: 5961912 (1999-10-01), Huang et al.
patent: 5969427 (1999-10-01), Wensel
patent: 6083775 (2000-07-01), Hunag et al.
patent: 6117708 (2000-09-01), Wensel
Hsu Kao-Yu
Kung Wei-Chun
Lee Shih Chang
Advanced Semiconductor Engineering Inc.
Geyer Scott
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