Substrate for semiconductor packaging

Details Substrate for semiconductor packaging Substrate for semiconductor packaging

2003-01-14

2004-11-02

Fahmy, Wael (Department: 2814)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S612000, C438S614000, C438S127000, C257S737000, C257S738000

Reexamination Certificate

active

06812125

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to substrates suitable for use in the packaging of integrated circuits. More particularly, the invention relates to the formation of simple plastic substrates.
There are a wide variety of integrated circuit packaging approaches that are popular today. One such approach contemplates providing a suitable substrate and mounting an array of integrated circuits on the substrate. The bond pads on the integrated circuits are then electrically connected to landings on the top surface of the substrate using conventional techniques such as wire bonding. The bottom surface of the substrates typically have contacts that can be electrically connected to external devices or landings which serve as attach pads for solder balls or the like that act as the external contacts.
Although the existing substrate based packaging works quite well, in some circumstances the substrate itself is one of the most expensive features of the package. Thus, there are continuing efforts to lower the costs of the substrate.
SUMMARY OF THE INVENTION
A plastic or resin based substrate panel for use in semiconductor package is described. The substrate includes a matrix of conductive elements (e.g. conductive studs, balls or the like) which are held in place by a plastic molding material. The conductive elements form conductive vias through the substrate and have exposed top and bottom surfaces which serve as contacts or landing that may be used to electrically couple electrical devices to the substrate. The conductive elements may be formed from a wide variety of materials, as for example, plated copper.
The substrate panel typically defines a plurality of device areas, which are each arranged to have an associated integrated circuit mounted thereon. A matrix of integrated circuits may be mounted onto the substrate panel and electrically connected to associated contacts within their respective device areas using conventional techniques such as wire bonding. In many embodiments, a plastic encapsulating material is molded over a top surface of the substrate panel to encapsulate the integrated circuits and bonding wires.
In a method aspect of the invention, a multiplicity of conductive elements are place on a tape in a predetermined pattern. A plastic or resin based material is molded around the conductive elements on the tape to form a substrate panel in which the conductive elements form vias through the substrate and have exposed top and bottom surfaces. The substrate panel may be populated with integrated circuits which in turn are electrically connected to the substrate, encapsulated and singulated to form a plurality of packaged integrated circuits.


REFERENCES:
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patent: 6573458 (2003-06-01), Matsubara et al.

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