Substrate clamping technique in IC fabrication processes

Details Substrate clamping technique in IC fabrication processes Substrate clamping technique in IC fabrication processes

1978-01-16

1980-01-15

Miller, J D

Electricity: electrical systems and devices

Electric charge generating or conducting means

Use of forces of electric charge or field

269321WE, H02N 1300

Patent

active

041841883

ABSTRACT:
An electrostatic clamping technique for use in clamping substrates in various semiconductor fabrication processes is disclosed. One example takes the form of a substrate support plate which has deposited on its working face two layers of thermally conductive, electrically insulative RTV silicone, between which layers is located an interdigital type printed circuit capacitor energized by a DC source in the kilovolt range. Secured to the back surface of the support plate is a water cooled jacket with the entire assembly adapted for location in the incident ion beam and having good thermal dissipation properties.
An alternate embodiment utilized an alumina support plate on which the capacitor of aluminum composition is deposited by vacuum evaporation; the exposed capacitor surface is rendered insulative by oxidation.

REFERENCES:
patent: 2897424 (1959-07-01), Waring
patent: 3150678 (1964-09-01), Nuber
patent: 3197682 (1965-07-01), Klass et al.
patent: 3634740 (1972-01-01), Stevko
patent: 3916270 (1975-10-01), Wachtler et al.

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