Substrate bias generator for use in dynamic random access memory

Details Substrate bias generator for use in dynamic random access memory Substrate bias generator for use in dynamic random access memory

1987-07-29

1989-01-10

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365 53, 357236, 357 41, 307304, G11C 700, G11C 702, H01L 2702, H03K 3353

Patent

active

047970014

ABSTRACT:
The invention relates to a substrate bias generator for use in dynamic random access memory, and in which either a plurality of transistors for rectification are disposed between a coupling capacitor and a substrate potential electrode or a threshold voltage of a transistor for rectification between the coupling capacitor and the substrate potential electrode is different from a threshold voltage of the other transistor making the absolute value of substrate potential smaller thereby, so that a depletion-layer distance formed between a P-type substrate and N.sup.+ -type substrate is shortened and that effect due to incidence of .alpha.-particle is reduced resulting in reducing soft error rate.

REFERENCES:
patent: 4233672 (1980-11-01), Suzuki et al.
patent: 4455628 (1984-06-01), Ozaki et al.
patent: 4559694 (1985-12-01), Yoh et al.
patent: 4691304 (1987-09-01), Hori et al.
patent: 4695746 (1987-09-01), Tobita
Substrate Bias Voltage Generator on Dynamic MOS RAM Chip, Shimotori et al., LSI Research and Development Laboratory, Mitsubishi Electric Corp., Itami-shi, Japan, pp. 769-776.
Alpha-Particle-Induced Field and Enhanced Collection of Carriers, IEEE Electron Device Letters, vol. EDL-3, No. 2, Feb. 1982, pp. 31-34.

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