Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1996-06-13
1997-04-22
Niebling, John
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257344, 257346, 257900, H01L 2976
Patent
active
056231539
ABSTRACT:
A reverse self-aligned field effect transistor having sub-quarter micrometer (<0.25 um) channel lengths, lightly doped source/drain, and shallow junction depths was achieved. The method for fabricating the FET includes a doped pad oxide layer that functions as both an etch stop layer and a diffusion source for the lightly doped drain. The doped pad oxide prevents the substrate from being etched when a channel opening for the gate electrode is etched in a source/drain polysilicon layer. The sub-quarter micrometer channel length was achieved by reducing the channel opening by sidewall spacer techniques. The shallow source/drain junctions out diffused from the polysilicon are about 0.10 to 0.15 um depth, and the lightly doped source/drain. Junctions are about 0.05 to 0.08 um depth.
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"A Sub-0.1 .mu.m Grooved Gate MOSFET with High Immunity to Short-Channel Effects" by J. Tanaka et al, IEDM Proceedings of the IEEE, 1993, pp. 537-540, Month Unknown.
Hsu Charles C.
Liang Mong-Song
Lebentritt Michael S.
Niebling John
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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