Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-08-29
2004-02-24
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
06696716
ABSTRACT:
TECHNICAL FIELD
The technical field relates generally to semiconductor integrated circuits. More particularly, it pertains to capacitors in semiconductor integrated circuits.
BACKGROUND
A capacitor is composed of two layers of a material that is electrically conductive (hereinafter, electrode) brought near to one another and separated by a material that is electrically nonconductive. Suppose the capacitor is connected to a battery with a certain voltage level (hereinafter, energy level). Charges will flow from the battery to be stored in the capacitor until the capacitor exhibits the energy level of the battery. Then, suppose further that the capacitor is disconnected from the battery. The capacitor will indefinitely exhibit the energy level of the battery until the charges stored in the capacitor are removed either by design or by accident.
This ability of the capacitor to “remember” an energy level is valuable to the operation of semiconductor integrated circuits. Often, the operation of such circuits may require that data be stored and retrieved as desired. Because of its ability to remember, the capacitor is a major component of a semiconductor memory cell. One memory cell may store one bit of data. A system of memory cells is a semiconductor memory array where information can be randomly stored or retrieved from each memory cell. Such a system is also known as a random-access memory.
One type of random-access memory is dynamic random-access memory (DRAM). The charges stored in DRAM tend to leak away over a short time. It is thus necessary to periodically refresh the charges stored in the DRAM by the use of additional circuitry. Even with the refresh burden, DRAM is a popular type of memory because it can occupy a very small space on a semiconductor surface. This is desirable because of the need to maximize storage capacity on the limited surface area of an integrated circuit
One type of capacitor that supports an increase in storage capacity uses an electrically nonconductive material that has a high dielectric constant. The processing of such a capacitor occurs in an environment that may not be completely contaminant-proof. Such contaminants may act to degrade the electrically nonconductive material. That act compromises the ability of the capacitor to maintain the charges. This is detrimental to the storage ability of a capacitor and would render a memory cell defective.
Thus, what is needed are systems, devices, structures, and methods to inhibit the described effect so as to enhance capacitors with a high dielectric constant in the presence of contaminants.
SUMMARY
The above-mentioned problems with capacitors as well as other problems are addressed by the present invention and will be understood by reading and studying the following specification. Systems, devices, structures, and methods are described which accord these benefits.
An illustrative embodiment includes a capacitor in a dynamic random access memory cell. The capacitor includes a first electrode, a dielectric coupled to the first electrode, and a second electrode coupled to the dielectric. The dielectric includes a thin film dielectric. The thin film dielectric includes an oxide compound. The oxide compound includes barium strontium titanate. The capacitor also includes at least one inhibiting layer that couples to the first electrode, the dielectric, and to the second electrode to define a chamber. The inhibiting layer includes a nitride compound. The nitride compound includes Si
x
N
y
. The variables x and y are indicative of a desired number of atoms.
Another illustrative embodiment includes a method of enhancing a semiconductor structure so as to inhibit dielectric degradation. The method includes forming at least one inhibiting layer to define a chamber having an aperture and at least two sidewalls that extend outwardly from the aperture. The inhibiting layer includes a nitride compound. The method includes forming a first conductive layer on the inhibiting layer such that the aperture of the chamber of the inhibiting layer exposes a portion of the first conductive layer. The method includes forming a dielectric layer on the first conductive layer. The dielectric layer includes an oxide compound. The oxide compound includes barium strontium titanate. The method includes annealing the semiconductor structure at a temperature of about greater than or about equal to 100 degrees Celsius. The act of annealing may occur in an ambient selected from a group consisting of N
2
, Ar, He, O
2
, O
3
, NO, and N
2
O. The method includes iterating the act of annealing after forming the first conductive layer, after forming a dielectric layer, and after forming the second conductive layer.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.
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Basceri Cem
Sandhu Gurtej Singh
Schwegman Lundberg Woessner & Kluth P.A.
Wojciechowicz Edward
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