Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-10-02
2001-10-16
Fahmy, Jr., Wael (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S243000, C438S253000, C438S696000, C438S386000, C438S387000, C438S396000
Reexamination Certificate
active
06303429
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a structure of a capacitor section of a dynamic random-access memory.
As the semiconductor manufacturing technology evolves, the integration density of semiconductor devices is progressively increasing. The higher the integration density of a dynamic random-access memory (hereinafter referred to as “DRAM”), the larger the storage capacity (the number of bits) of the memory, and the smaller the area which each memory cell (one bit) occupies on the semiconductor substrate.
To reduce the area each memory cell occupies, it is necessary to decrease the sizes of the MOS transistor and capacitor which constitute the memory cell. The capacitor incorporated in each memory cell of the DRAM must maintain its capacitance at tens ofF's, no matter how much the area the memory cell occupies is reduced.
Various types of capacitors have been developed for use in the memory cells of DRAMs. One is a stacked type which have storage electrodes (or storage nodes) stacked one above another on a semiconductor substrate. Another is a trench type which has a storage electrode formed in a trench made in a semiconductor substrate and which has a three-dimensional structure.
The stacked type capacitor has a trench in each interlayer insulator provided on the semiconductor substrate. One storage electrode is formed on the sides and bottom of the trench and has an area greater and, hence, a larger capacitance, than otherwise. (See, for example, U.S. Pat. No. 5,444,013.)
It is proposed that the capacitor insulating film be made of high-dielectric materials, instead of the conventionally used ones such as silicon oxide and silicon nitride, so that the capacitor may have capacitance sufficiently large. Examples of high-dielectric materials are: tantalum oxide (Ta
2
O
5
), strontium titanate (SrTiO
3
, known as “STO”), and barium strontium titanate ((Ba, Sr)TiO
3
, known as “BSTO”).
An example of a memory cell which has a capacitor film made of high-dielectric material is disclosed in A. Yuuki et al., “International Electron Device Meeting 1995,” pages 115 to 118. The capacitor of this memory cell has a simple stacked structure. Its storage electrodes are made of ruthenium and its capacitor insulating film is made of BSTO.
FIG. 1
shows capacitors formed in trenches made in an interlayer insulator.
FIG. 2
is a sectional view taken along line II—II in FIG.
1
.
The capacitors are arranged on the semiconductor substrate, forming an array. Each capacitor is composed of a storage electrode
53
and a plate electrode
55
. The storage electrode
53
is provided on the sides and bottom of the trench
52
made in the interlayer insulator
51
. The plate electrode
55
is provided common to all capacitors.
Capacitors of this type are used in the memory cells of DRAMs. Their storage electrodes are connected to one of the source and drain diffusion layers of MOS transistors by contact plugs
50
.
As shown in
FIGS. 1 and 2
, an interlayer insulator
51
isolates any two adjacent capacitors. The recent trend is that the distance d between the capacitors is reduced, increasing the area of each capacitor as much as possible, thereby to prevent the capacitance of each capacitor from decreasing in spite of the reduced size of the memory cells. If the distance d is reduced, however, the leakage current flowing between the adjacent capacitors will increase, or insulation breakdown will occur between the storage electrodes of the adjacent capacitors. If the leakage current increases the insulation breakdown occurs, the capacitors cannot be electrically isolated so sufficiently that the cell may function well enough in DRAMs.
BRIEF SUMMARY OF THE INVENTION
This invention has been made in view of the foregoing. The object of the invention is to provide a new type of insulating structure which enables a capacitor to function sufficiently even if the interval between it and any other capacitor is small in a dynamic random-access memory.
To attain the object mentioned above, a semiconductor device according to this invention comprises a first insulating film having a trench; a second insulating film provided on only the sides of the trench of the first insulating film; a first electrode provided in the trench of the first insulating film; a third insulating film provided in the trench of the first insulating film and covering the second insulating film; and a second electrode provided on the third insulating film.
Another semiconductor device according to the invention comprises: a first insulating film having a plurality of trenches; a plurality of second insulating films provided only the sides of the trenches of the first insulating film; a plurality of first electrodes provided in the trenches of the first insulating film and covering the second insulating films; a third insulating film provided on the first electrodes; and a second electrode provided on the third insulating film.
According to this invention, there is provided a method of manufacturing a semiconductor device, which comprises the steps of: forming a trench in a first insulating film; forming a second insulating film on only the sides of the trench of the first insulating film; forming a first electrode in the trench of the first insulating film, thereby covering the second insulating film; forming a third insulating film on the first electrode; and forming a second electrode on the third insulating film.
Another method of manufacturing a semiconductor device, according to the invention, comprises the steps of: forming a contact plug connected to one of the source diffusion layer and drain diffusion layer of a MOS transistor; forming a first insulating film covering the contact plug; forming in the first insulating film a trench which reaches the contact plug; forming a second insulating film on only the sides of the trench of the first insulating film; forming a first electrode in the trench of the first insulating film, the first electrode covering the second insulating film and connected to the contact plug; forming a third insulating film on the first electrode; and forming a second electrode on the third insulating film.
Additional object and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The object and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
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“Novel Stacked Capacitor Technology for 1 Gbit DRAMs with CVD-(Ba,Sr)TiO3Thin Films on a Thick Storage Node of Ru”, A. Yuuki, M. Yamamuka, T. Kakita, T. Horikawa, T. Shibano, N. Hirano, H. Maeda, N. Mikami, K. Ono, H. Ogata, and H. Abe, Semiconductor Research Laboratory, Materials and Electronic Devices Laboratory, ULSI Laboratory, Mitsubishi Electric Coproration, 1995 IEEE, pp. 5.2.1-5.2.4, IEDM 95-115.
“1990 IEEE International Solid-State Circuits Conference Digest of Technical Papers”, ISSN 0193-6530, 1990 IEEE International Solid State Circuit Conference, Feb. 1990.
Koichi SEKI et al; “Non-Volatile and Fast Static Memories; An 80ns 1 Mb Flash Memory with On-Chip Erase/Erase-Verify Conroller,” ISSCC 1990 Digest of Technical Papers, pp. 60-61.
Ishibashi Yutaka
Kohyama Yusuke
Ozaki Tohru
Banner & Witcoff , Ltd.
Fahmy Jr. Wael
Kabushiki Kaisha Toshiba
Toledo Fernando
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